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SAN FRANCISCO—IP developer Intelop Corp. announced delivery of its second generation TCP offload engine SoC integrated with ARP hardware module, G Bit Ethernet MAC and AMBA 2.0 bus interface running at 2 Gbps sustained rates.
According to Intelop (Santa Clara, Calif.) the module implements control plane and data plane processing of TCP/IP in hardware that is at least 20 times faster than TCP/IP software stack. The architecture provides, as an option, an ability to integrate other interfaces such as PCIe x 4, the company said.
Intelop designed, verified and implemented this SoC in Altera's high-speed FPGA, Intelop said. The company did not identify which Altera device it used.
Because of its advanced scalable architecture, the module can be customized to implement differentiated features and performance requirements to meet customer's specifications, Intelop said.
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