Latest eASIC design suite targets 45-nm designs

The eTools 8.0 tool suite delivers a robust ASIC-grade design flow with the simplicity, ease of design and a cost point that is normally associated with FPGA design tools, according to eASIC (Santa Clara, Calif.). The company bills Nextreme-2 ASICs as a lower cost and lower power alternative to FPGAs with lower non-reoccurring engineering costs than traditional ASICs.

The eTools 8.0 suite includes a number of new capabilities that simplify the transition path for designers looking to adopt Nextreme-2 devices, eASIC said. These capabilities include a GUI-based design environment, Design Navigator, IP-wizards that facilitate easier integration of IP blocks, a new power estimation tool that enables power estimation based on the RTL and a floor planning tool for making optimal macro placements, the company said. Designers have the option of performing synthesis using Magma Talus RTL or Synopsys DC tools, eASIC said.

FPGA and ASIC designers can try a free 30-day evaluation of eTools 8.0 and Magma Talus RTL software by visiting the eASIC website.

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