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Mentor has announced support for hardware description language (HDL) generated by MathWorks Simulink HDL Coder in the Mentor Graphics Precision suite of advanced synthesis products.
This capability enables mutual customers to transfer VHDL and Verilog generated by Simulink HDL Coder into the Precision Synthesis tool directly to generate an optimized netlist implementation for field programmable gate array (FPGA) designs. All mutual customers using Precision 2006a release or newer with Simulink HDL Coder can benefit from this flow, which will improve the productivity of FPGA design synthesis.
The MathWorks and Mentor Graphics have collaborated on this flow to facilitate interoperability. Simulink HDL Coder generates bit-true, cycle-accurate, synthesizable Verilog and VHDL code from Simulink models, Embedded MATLAB code, and Stateflow charts.
Precision Synthesis is available at a starting price of $20,200 (USD). For additional product information, go to the company website: www.mentor.com/fpga, contact a local Mentor Graphics sales office, or call 1-800-547-3000 for specific product and pricing details.
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