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Study gives mixed marks to high-level synthesis



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Courtesy of EE Times

SAN FRANCISCO—High-level synthesis (HLS) tools for FPGA design deliver excellent results and are easy to use, but do not fully abstract users from the FPGA RTL tool flow, according to a study conducted by benchmarking and analysis firm BDTI Inc.

In the study, created with help from FPGA vendor Xilinx Inc., BDTI engineers using HLS tools with an FPGA achieved results equal to an FPGA designed with RTL and 30 times better than a DSP processor, according to the firm said.

But weaknesses in RTL tools prevent HLS tools from fully delivering on their promise, because HLS tools only accelerate a portion of the design flow, BDTI said. After generating RTL code using HLS tools, users still need an experienced FPGA designer to implement the code at the back end using FPGA design tools, the study found.

Preliminary results for the BDTI Optical Flow Workload, as judged by maximum frame rate achievable at 720p resolution (source: BDTI).

"High-level synthesis tools did a great job getting us from C to RTL, but once we are at the RTL point we had to take that RTL in a manual way through the traditional FPGA tool flow," said Jeff Bier, founder and president of BDTI. "Getting from RTL to a bit stream on the FPGA required a lot of expertise."

HLS tools have been around for roughly 20 years, mainly for ASIC design, but have not enjoyed large-scale success, BDTI noted. This has resulted in widespread skepticism that they will ever deliver, according to BDTI.

Bier said BDTI launched a program to evaluate HLS tools targeting FPGAs because processor users seeking high performance are being forced to move to multi-core chips, but parallel programming tools and techniques are immature. Also, many FPGA users are facing design-cost and time-to-market crises as designs get more complex because RTL design is difficult and time-consuming, Bier said. Making FPGAs much easier to use through HLS tools "could be a real game changer," Bier said.

So far, BDTI has evaluated only two HLS tools: AutoPilot from AutoESL Design Technologies Inc. (Cupertino, Calif.) and Pico from Synfora Inc. (Mountain View, Calif.).



Page 2: Cooperation needed on integration with RTL  

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Related Links:
  • http://www.eetimes.com/showArticle.jhtml?articleID=212501877
  • http://www.eetimes.com/showArticle.jhtml?articleID=218101873
  • http://www.eetimes.com/showArticle.jhtml?articleID=221601426
  • http://www.eetimes.com/showArticle.jhtml?articleID=212400235






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