|
|
Highest Rated Articles |
|
|
Score |
|
Title |
|
Author/Company |
|
Date/Type |
| |
4.1
|
|
How to implement a digital oscilloscope in Structured ASIC fabric
|
|
Mircea Moldovan, Dan Nicula, and Traian Tulbure, eASIC Corporation
| |
Jul 12, 2006
|
| |
4.07
|
|
Introducing MagnaPHY high-speed chip-to-chip serial interconnect
|
|
Clive Maxfield
| |
Feb 01, 2008
|
| |
3.8
|
|
How to raise the RTL abstraction level and design conciseness with SystemVerilog - Part 1
|
|
Sachin Kakkar, Sanjay Gupta, Ayan Banerjee, and Rohit Goel, Mentor Graphics
| |
Apr 30, 2008
|
| |
3.76
|
|
Dynamically-reconfigurable ECAs - Part 5 (Student Project #3)
|
|
Alexander R. Marschner, Virginia Tech
| |
Jan 16, 2008
|
| |
3.69
|
|
Xilinx Virtex-5 User-Guide Lite
|
|
Peter Alfke, Xilinx
| |
Feb 13, 2008
|
| |
3.67
|
|
Ethernet and Multimedia Applications - The History and the Future - Part 2
|
|
Neeraj Parik, Xilinx
| |
Nov 28, 2007
|
| |
3.63
|
|
Dynamically-reconfigurable Elemental Computing Arrays (ECAs) - Part 2 (Programming Model)
|
|
Clive Maxfield
| |
Dec 05, 2007
|
| |
3.63
|
|
How to achieve timing-closure in high-end FPGAs
|
|
Angela Sutton and Jeff Garrison, Synplicity
| |
Jan 23, 2008
|
| |
3.62
|
|
Ethernet and Multimedia Applications - The History and the Future - Part 1
|
|
Neeraj Parik, Xilinx
| |
Nov 21, 2007
|
| |
3.61
|
|
Dynamically-reconfigurable ECAs - Part 4 (Student Project #2)
|
|
Chen Zhang, Virginia Tech
| |
Jan 02, 2008
|
| |
3.6
|
|
A code-free approach to touch and proximity sensing for embedded systems
|
|
Mark Lee, Cypress Semiconductor
| |
Feb 06, 2008
|
| |
3.57
|
|
Dynamically-reconfigurable Elemental Computing Arrays (ECAs) - Part 1 (Architecture)
|
|
Clive Maxfield
| |
Nov 07, 2007
|
| |
3.57
|
|
Using FPGAs to avoid microprocessor obsolescence
|
|
John Swan (Lattice) and Tomek Krzyzak (Digital Core Design)
| |
Mar 05, 2008
|
| |
3.57
|
|
Dynamically-reconfigurable ECAs - Part 3 (Student Project #1)
|
|
Abhranil Maiti, PhD Student, Virginia Tech
| |
Dec 19, 2007
|
| |
3.5
|
|
How to support multiple SD devices using CPLDs
|
|
Mark Ng, Xilinx
| |
Aug 22, 2007
|
| |
3.4
|
|
Evolving passive optical networks (PONs) demand FPGA design flexibility
|
|
Nilam Ruparelia, Altera
| |
Mar 12, 2008
|
| |
3.38
|
|
Designing DDR3 SDRAM controllers with today's FPGAs
|
|
Adrian Cosoroaba, Xilinx
| |
Dec 12, 2007
|
| |
3.29
|
|
How to achieve design flexibility for free using Structured ASIC approaches
|
|
Mark Goode, ViASIC
| |
Mar 26, 2008
|
| |
3.29
|
|
Software and RTOS synthesis: The next step in software development?
|
|
Arnold Berger, Mathew Hill, and Bob Zeidman
| |
Feb 27, 2008
|
| |
3.14
|
|
How to maximize FPGA performance
|
|
Michelle Fernandez, Xilinx
| |
Jan 15, 2007
|
| |
3.11
|
|
How to use FPGAs for quadrature encoder-based motor control applications
|
|
Glen Young, Actel
| |
Sep 11, 2007
|
| |
3.07
|
|
FPGA-based hardware acceleration of C/C++ based applications - Part 4
|
|
Robin Bruce, Nallatech
| |
Oct 24, 2007
|
| |
3.04
|
|
How to use programmable analog to measure MEMS gyroscopes
|
|
Patrick Prendergast and Ben Kropf, Cypress Semiconductor
| |
Jan 31, 2007
|
| |
3
|
|
Design Recipes for FPGAs - A Simple VGA Interface
|
|
Peter Wilson
| |
Jan 09, 2008
|
| |
2.93
|
|
FPGA-based hardware acceleration of C/C++ based applications - Part 1
|
|
Steve Casselman, DRC Computer Corp
| |
Jul 25, 2007
|
|
|
|
