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Highest Rated Articles |
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Score |
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Title |
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Author/Company |
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Date/Type |
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4.13
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Programmable logic innovation is overdue
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Jack Ogawa, Cswitch Corp
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Jan 27, 2009
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4.07
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How to implement a digital oscilloscope in Structured ASIC fabric
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Mircea Moldovan, Dan Nicula, and Traian Tulbure, eASIC Corporation
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Jul 12, 2006
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4.03
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How to interface FPGAs to microcontrollers
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Rocendo Bracamontes Del Toro, Atmel
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Jul 30, 2008
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4
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Xilinx Spartan-6 FPGA User Guide Lite
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Peter Alfke, Xilinx Inc.
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Aug 05, 2009
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3.95
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To accelerate or not to accelerate...
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Geno Valente, XtremeData
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Jun 10, 2008
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3.91
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Introducing MagnaPHY high-speed chip-to-chip serial interconnect
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Clive Maxfield
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Feb 01, 2008
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3.86
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X Marks the spot...the intersection of eco- and financially-friendly computing
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Geno Valente, XtremeData
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Nov 12, 2008
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3.76
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Xilinx Virtex-5 User-Guide Lite
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Peter Alfke, Xilinx
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Feb 13, 2008
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3.76
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Dynamically-reconfigurable ECAs - Part 5 (Student Project #3)
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Alexander R. Marschner, Virginia Tech
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Jan 16, 2008
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3.75
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Using yesterday's methodologies to design today's multi-FPGA systems is a recipe for disaster
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Bruce Riggins, Taray Inc.
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Jan 07, 2009
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3.74
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Dynamically-reconfigurable ECAs - Part 4 (Student Project #2)
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Chen Zhang, Virginia Tech
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Jan 02, 2008
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3.73
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Designing DDR3 SDRAM controllers with today's FPGAs
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Adrian Cosoroaba, Xilinx
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Dec 12, 2007
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3.71
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How to raise the RTL abstraction level and design conciseness with SystemVerilog - Part 1
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Sachin Kakkar, Sanjay Gupta, Ayan Banerjee, and Rohit Goel, Mentor Graphics
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Apr 30, 2008
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3.71
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How to get the most out of a single timer on an MCU
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Ajit Basarur, Shantanu Prasad Prabhudesai, and Ritesh Ramesh Parekh, Ittiam Systems
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Mar 28, 2008
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3.67
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High-definition surveillance systems using low-cost FPGAs
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Suhel Dhanani, Senior Manager, Altera, and Mankit Lo, CEO, EyeLytics
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Mar 25, 2009
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3.67
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Power-aware FPGA design (Part 1)
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Hichem Belhadj, Vishal Aggrawal, Ajay Pradhan, and Amal Zerrouki, Actel
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Feb 04, 2009
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3.67
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Strategies for minimizing Xilinx implementation tool runtimes
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Philippe Garrault, Xilinx
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Mar 24, 2008
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3.66
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Dynamically-reconfigurable Elemental Computing Arrays (ECAs) - Part 2 (Programming Model)
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Clive Maxfield
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Dec 05, 2007
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3.65
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Ethernet and Multimedia Applications - The History and the Future - Part 1
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Neeraj Parik, Xilinx
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Nov 21, 2007
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3.63
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How to achieve timing-closure in high-end FPGAs
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Angela Sutton and Jeff Garrison, Synplicity
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Jan 23, 2008
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3.62
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Dynamically-reconfigurable ECAs - Part 3 (Student Project #1)
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Abhranil Maiti, PhD Student, Virginia Tech
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Dec 19, 2007
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3.6
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How to design portable handsets using CPLDs
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Michael Gordon, Xilinx
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May 21, 2008
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3.6
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Wavelet data hiding using Achterbahn-128 on FPGAs
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Fatma Elfoly (Alshorouk Academy, Egypt) and collegues.
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Dec 26, 2007
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3.6
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Dynamically-reconfigurable Elemental Computing Arrays (ECAs) - Part 1 (Architecture)
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Clive Maxfield
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Nov 07, 2007
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3.57
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How to manage dynamic power in a microcontroller using its non-maskable interrupt
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Ajit Basarur, Shantanu Prasad Prabhudesai, and Nazmul Hoda, Ittiam Systems
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Aug 06, 2008
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