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FPGA Architectures from 'A' to 'Z' : Part 2

If you are new to FPGAs, there are a bewildering number of different architectures and related concepts; but fear not, because this tutorial explains all.

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Editor's Note: This is Part 2 of an article that is abstracted from Chapter 4 of my book The Design Warrior's Guide to FPGAs, ISBN: 0750676043, with the kind permission of the publisher (See also Part 1).

Embedded multipliers, adders, MACs, etc.
Some functions like multipliers are inherently slow if they are implemented by connecting a large number of programmable logic blocks together. Since these functions are required by a lot of applications, many FPGAs incorporate special hard-wired multiplier blocks (Fig 11).


11. Bird's-eye view of chip with columns
of embedded multipliers and RAM blocks.

Similarly, some FPGAs offer dedicated adder blocks. One operation that is very common in DSP-type applications is called a multiply-and-accumulate. As its name would suggest, this function multiplies two numbers together and adds the result into a running total stored in an accumulator. Hence, it is commonly referred to as a MAC, which stands for Multiply, Add, and aCcumulate (Fig 12).


12. The core functions forming a MAC.

If the FPGA you are working with supplies only embedded multipliers, you would have to implement this function by combining the multiplier with an adder formed from a number of programmable logic blocks, while the result would be stored in some associated flip-flops, in a block RAM, or in a number of distributed RAMs. Life becomes a little easier if the FPGA also provides embedded adders, and some FPGAs provide entire MACs as embedded functions.

Embedded processor cores (hard and soft)
Almost any portion of an electronic design can be realized in hardware (using logic gates and registers etc.) or software (as instructions to be executed on a microprocessor). One of the main partitioning criteria is how fast you wish the various functions to perform their tasks:

  • Picosecond and nanosecond logic: This has to run insanely fast, which mandates that it be implemented in hardware (in the FPGA fabric).
  • Microsecond logic: This is reasonably fast and can be implemented either in hardware or software (this type of logic is where you spend the bulk of your time deciding which way to go).
  • Millisecond logic: This is the logic used to implement interfaces such as reading switch positions and flashing light-emitting diodes (LEDs). It's a pain slowing the hardware down to implement this sort of function (using huge counters to generate delays, for example). Thus, it's often better to implement these tasks as microprocessor code (because processors give you lousy speed – compared to dedicated hardware – but fantastic complexity).

The fact is that the majority of designs make use of microprocessors in one form or another. Until recently, these appeared as discrete devices on the circuit board. Of late, high-end FPGAs have become available that contain one or more embedded microprocessors, which are typically referred to as microprocessor cores. In this case, it often makes sense to move all of the tasks that used to be performed by the external microprocessor into the internal core. This provides a number of advantages, not the least that it saves the cost of having two devices; it eliminates large numbers of tracks, pads, and pins on the circuit board; and it makes the board smaller and lighter.

Hard microprocessor cores: A hard microprocessor core is one that is implemented as a dedicated, predefined block. There are two main approaches for integrating such a core into the FPGA. The first is to locate it in a strip (actually called "The Stripe") to the side of the main FPGA fabric (Fig 13).


13. Bird's-eye view of chip with embedded core outside of the main fabric.

In this scenario, all of the components are typically formed on the same silicon chip, although they could also be formed on two chips and packaged as a multi-chip module (MCM). The main FPGA fabric would also include the embedded RAM blocks, multipliers, etc. introduced earlier, but these have been omitted from this illustration to keep things simple.

One advantage of this implementation is that the main FPGA fabric is identical for devices with and without the embedded microprocessor core, which can help to make things easier for the design tools used by the engineers. The other advantage is that the FPGA vendor can bundle a whole load of additional functions in the strip to complement the microprocessor core, such as memory and special peripherals, etc.

An alternative is to embed one or more microprocessor cores directly into the main FPGA fabric. One, two, and even four core implementations are currently available as I pen these words (Fig 14).


14. Bird's-eye view of chips with one or more embedded cores inside the main fabric.

Once again, the main FPGA fabric would also include the embedded RAM blocks, multipliers, etc. introduced earlier, but these have been omitted from this illustration to keep things simple.

In this case, the design tools have to be able to take account of the presence of these blocks in the fabric; any memory used by the core is formed from embedded RAM blocks, and any peripheral functions are formed from groups of general-purpose programmable logic blocks. Proponents of this scheme will argue that there are inherent speed advantages to be gained from having the microprocessor core in intimate proximity to the main FPGA fabric.

Soft microprocessor cores: As opposed to physically embedding a microprocessor into the fabric of the chip, it is possible to configure a group of programmable logic blocks to act as a microprocessor. These are typically called "soft cores", but they may be more precisely categorized as either "soft" or "firm" depending on the way in which the microprocessor's functionality is mapped onto the logic blocks (see also the discussions associated with the Hard IP, Soft IP, and Firm IP topic later in this paper).

Soft cores are simpler (more primitive) and slower than their hard-core counterparts (a soft core typically runs at 30% to 50% of the speed of a hard core). However, they have the advantage that you only need to implement a core if you need it, and also that you can instantiate as many cores as you require until you run out of resources in the form of programmable logic blocks.

[Editor's Note: Perhaps the key advantage to using "soft" cores is the ability to customize them to your application. Using custom instructions, multiple bus masters, custom processing peripherals, and customized bus fabrics, you can create 100 MHz soft-processor systems that out-perform a 3+ GHz general purpose processor. The huge differentiator in these soft processor FPGA-based systems is the quality of the tools and their ability to simplify the task of tying these processing fabrics together.]

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