|
|
Featured Design Center |
|
|
|
|
|
|
|
Using SerDes in Fourth Generation Wireless Infrastructure
As the network equipment infrastructure is built up for 4G there will be an demand for high serial data rates between the main control radio equipment and that in distributed base stations. Here is how to meet the high serial data rate by only ugrading the Serdes through the use of a discrete solution
|
|
|
Architecture/Implementation
Using SerDes in Fourth Generation Wireless Infrastructure
As the network equipment infrastructure is built up for 4G there will be an demand for high serial data rates between the main control radio equipment and that in distributed base stations. Here is how to meet the high serial data rate by only ugrading the Serdes through the use of a discrete solution
Using an FPGA to tame the power beast in consumer handheld MPUs
Shorter product lifecyles and lower volume consumer product families have led designers increasingly to turn to the FPGA for handheld-product development. But doing so requires grappling with new challenges in terms of area, speed and power.
Power Supply Design Considerations for Modern FPGAs
Today's FPGAs tend to operate at lower voltages and higher currents than their predecessors. Consequently, power supply requirements may be more demanding, requiring special attention to features deemed less important in past generations. Failure to consider the output voltage, sequencing, power on, and soft-start requirements, can result in unreliable power up or potential damage to the FPGA.
See all Architecture/Implementation »
Interconnect Design
Backplane tutorial: RapidIO, PCIe and Ethernet
RapidIO, PCIe, and Ethernet each offer unique benefits. We explain how each technology works, and examine its strengths and weaknesses. We also show why RapidIO is often the best choice for embedded systems.
PCI Express bridging options enable FPGA-based configurable computing
In many embedded systems, FPGAs have augmented or displaced dedicated MPUs and DSPs, so endpoint bridging solutions for PCIe must enable FPGAs to fulfill their new role.
A primer on extending serial ports in embedded designs
Vikas Shukla provides some reminders about the many ways that an embedded systems developer can add more serial ports to a design if they are needed.
See all Interconnect Design »
Embedded Processing/DSP
Increasing bandwidth in industrial applications with FPGA co-processors
This article discusses the general issues of moving part, or all, of a DSP industrial application onto an FPGA using system software design tools. Using an FPGA and automated design software, design engineers have the ability to optimize system performance in ways not possible with a traditional DSP.
Product how-to: DSP/FPGA platform for video surveillance
Avnet's video surveillance platform pairs a TI DM6437 DaVinci DSP with a Xilinx Spartan-3A DSP FPGA. here's how the platform works, and how to get the most out of it.
Implementing LTE on FPGAs
Here's a review of the LTE algorithms and a practical implementation on a Xilinx FPGA. The reference design is tested using multiple video stream with varying encoding rates.
See all Embedded Processing/DSP »
FPGA-to-ASIC Conversion
FPGA-Based Prototyping - "Productivity to Burn"
This article highlights recent tool advances that can help you setup, implement, and verify your FPGA-based ASIC prototype faster than ever before.
Getting the most out of ASIC prototyping with FPGAs
This tutorial discusses various issues that must be taken into account when using an FPGA to prototype an ASIC or SoC design.
Hi def video scaler ASIC development from FPGA
How a high-definition video scaler ASIC implemented in a 0.18um standard cell technology was developed rapidly by starting with FPGA.
See all FPGA-to-ASIC Conversion »
Design Tools/Software
Automating the FPGA design debug process
To elevate productivity, FPGA designers need to shift to the use of RTL for debugging their designs and not the gate-level description generated by synthesis.
EE Times' Top 10 Design Features of 2009
The top ten EETimes design features of 2009 show the conflicts inherent with grip of C on embedded programmers, the popularity of teardowns and the need for further education, both on the basics as well as cutting-edge design issues such as HDMI/DVI handshaking.
FPGA synthesis can be a leverage point in your design flow
Large FPGA devices pose significant challenges to an FPGA project team, requiring sound design flow practices. FPGA synthesis can provide significant leverage in achieving project cost, time and quality goals. This article discusses how FPGA synthesis tools can help designers achieve their goals efficiently and effectively.
See all Design Tools/Software »
See all Design Center »
|
|
|
PROGRAMMABLE LOGIC DESIGN CENTER ARCHIVE
|
| |
About the Programmable Logic DesignLine How-To Section
Programmable Logic DesignLines' Design Center section delivers practical how-to information for the design and implementation of field programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), gate arrays, and structured ASICs. Key topics covered in this section include: FPGA Tools/software, FPGA synthesis, DSP design, high-speed interconnects, FPGA/CPLD architectures, structured ASIC design, and embedded processing design.
|
|
|
