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How to give crime-fighters a flexible, high-performance edge with programmable logic
This article examines the use of FPGAs and soft-core embedded processors in two crime-fighting applications: a fingerprint identification system and a wireless auto-tracking camera.

Architecture/Implementation

How to select an AES solution
To achieve higher data throughput designers can use an ASIC or FPGA platform to provide hardware acceleration.

Simple power supply for FPGAs, Part 2
DC/DC IC building-block systems such as Linear Technology's microModules are a good solution for simple and compact low-voltage, high-current power supply applications.

How to select CPLDs for handheld applications
CPLDs offer designers a low-cost system solution with significant advantages compared to traditional implementations using ASICs and ASSPs.

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Interconnect Design

Evolving passive optical networks (PONs) demand FPGA design flexibility
Standards uncertainties abound going forward with PONs; the bedrock for bridging those issues is scalability and flexibility, both of which are provided by FPGAs.

Comparing IP integration approaches for FPGA implementation
Avoiding the fixed routing and timetable of a standard bus can open up new avenues for design and restore a bit of glamour and creativity to an otherwise mundane project.

Back to the future: Low-cost, low-bit-rate serial communications with Manchester Encoding - Part 2
As a follow up to Part 1 on the basics of Manchester Encoding, Robert Guastella provides a realistic example of how to implement the protocol in a real world low bit rate serial wired or wireless design using a PIC MCU.

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Embedded Processing/DSP

How to give crime-fighters a flexible, high-performance edge with programmable logic
This article examines the use of FPGAs and soft-core embedded processors in two crime-fighting applications: a fingerprint identification system and a wireless auto-tracking camera.

Data compression for high-speed DSP, part 2
Samplify benchmarks its compression algorithm against LZ-based lossless compression algorithms and consumer compression algorithms such as MP3, JPEG, and H.264.

Massively parallel processing arrays (MPPAs) for embedded HD video and imaging (Part 2)
A JPEG image compression application using MPPA architecture requires less programming effort than with other processor architectures and embedded video application development is speeded.

See all Embedded Processing/DSP »

FPGA-to-ASIC Conversion

FPGA-Based Prototyping - "Productivity to Burn"
This article highlights recent tool advances that can help you setup, implement, and verify your FPGA-based ASIC prototype faster than ever before.

Getting the most out of ASIC prototyping with FPGAs
This tutorial discusses various issues that must be taken into account when using an FPGA to prototype an ASIC or SoC design.

Hi def video scaler ASIC development from FPGA
How a high-definition video scaler ASIC implemented in a 0.18um standard cell technology was developed rapidly by starting with FPGA.

See all FPGA-to-ASIC Conversion »

Design Tools/Software

How to simplify power design development and evaluation for FPGA-based systems
Validation of power supply voltage at the FPGA; real-time monitoring of Vccint power consumption; realistic power estimates using accurate on-die temperature measurement.

How to overcome the increasing management complexity of FPGA/PCB Pin synchronization
Given a unified electronics design tool, it is possible to overcome the increasing management complexity of developing with modern FPGA devices and harness their benefits.

Frequency domain tutorial, part 1: Dealing with ambiguity
Here's what you need to know about the mathematics and notation of FFTs and the discrete frequency domain. We start by discussing the ambiguities of discrete signals.

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PROGRAMMABLE LOGIC DESIGN CENTER ARCHIVE

July 2008 Programmable Logic Design Center
June 2008 Programmable Logic Design Center
May 2008 Programmable Logic Design Center
April 2008 Programmable Logic Design Center
March 2008 Programmable Logic Design Center
February 2008 Programmable Logic Design Center
January 2008 Programmable Logic Design Center
December 2007 Programmable Logic Design Center

About the Programmable Logic DesignLine How-To Section
Programmable Logic DesignLines' Design Center section delivers practical how-to information for the design and implementation of field programmable gate arrays (FPGAs), complex programmable logic devices (CPLDs), gate arrays, and structured ASICs. Key topics covered in this section include: FPGA Tools/software, FPGA synthesis, DSP design, high-speed interconnects, FPGA/CPLD architectures, structured ASIC design, and embedded processing design.

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