Standby mode - An FPGA may spend most of its time in stand-by mode, where the device is powered up but not active. Power in this mode is commonly called static power. FPGAs are commonly used as co-processing devices, where parallel processing is required for data processing or image manipulation. In systems where the device may be waiting for user input, a simple processor can perform basic user interfaces, while waiting for an interrupt to indicate that it is time for the FPGA to power up and perform processing.
Even in this mode, SRAM FPGAs use significantly more power than flash FPGAs. Temperature also plays an important role in standby mode. At room temperature, SRAM FPGAs can draw 1,000 times or more static power than flash FPGAs, increasing at elevated temperatures. Even for portable devices that operate mostly in standby mode, flash FPGAs are the clear choice.
Shown is SRAM power up and configuration current vs. non-volatile flash FPGAs
Click on image to enlarge. |
Active mode - In active mode, FPGAs perform operations based on their programming. The I/Os and logic cells are switching, and power consumption (of dynamic power) is a function of capacitance, operating voltage and switching frequency.
If dynamic power were the only power component incurred through executing logic operations, power profiles for all advanced FPGA technologies would be similar. But the total power in active mode includes the dynamic power plus the static power. Even in active mode, SRAM FPGAs consume more power than flash-based devices, because of the significantly higher static power component. And as with stand-by mode, the power difference in active mode at high temperatures is even more pronounced.
Sleep mode - To conserve power in portable devices, particularly when idle, design teams commonly implement system sleep modes. Note that sleep mode is different from standby mode.
In standby mode, the device is powered up but is not executing instructions; in sleep mode, the device maintains only minimum power levels to ensure quick startup once the system is switched on.
Without special design considerations (such as additional circuitry to compensate for sleep mode), SRAM FPGAs lose their configuration data and must be reconfigured before switching to stand-by or active mode, making this switch consume configuration power.
In the portable marketplace, low power technology is of little use without small scale packaging.
Device footprint and thickness are important, as is the number of I/Os. Fast moving technology markets are forcing designers to replace ASICs with flexible FPGA technology to reduce design time and risk. Choosing the right FPGA technology is critical to design success in the portable, low-power market. SRAM FPGA's large device footprint and high power requirements make them unsuitable for these applications.
