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Editor's Note: I've long been impressed by Xcell Journal from Xilinx, both for the quality of its production and the quality of its articles.
A few weeks ago we looked at an article on Replacing obsolete video game circuits with Xilinx CPLDs; last week we pondered Solving FPGA I/O pin assignment challenges; and now – as the third and final part of this mini-series – I'm delighted to have the opportunity to present the following piece from the Third Quarter 2008 issue of Xcell Journal, with the kind permission of Xilinx.
Engineers typically use the boundary scan chain to program devices such as CPLDs or flash memories. But more engineers should be tapping into the power of boundary scan as a way of extracting detailed information about how boards or systems are functioning.
With the recent introduction of the Xilinx System Monitor function inside the latest Virtex-5 FPGAs, you can now collect voltage and temperature information from within the FPGA using the same Joint Test Action Group (JTAG) test access port (TAP) traditionally used for boundary scan functions and programming devices.
And by using equipment and test scripts provided by Xilinx partner XJTAG, or by writing your own scripts, you can more easily verify analog signals at various points in the circuit from within the boundary scan test environment. XJTAG's boundary scan test system helps engineers test devices such as discrete temperature sensors, DACs, or VGA ports.
System Monitor: A device-level test probe
The System Monitor is analog circuitry within the Xilinx Virtex-5 FPGA architecture that samples on-chip temperature and voltage (Fig 1).
1. System Monitor allows you to monitor voltages and temperature of a Virtex-5 FPGA die and as many as 17 other analog sources that can impact overall system performance.
(Click this image to view a larger, more detailed version)
The dedicated System Monitor circuitry – which is built around a 200-ksps ADC by default – performs a continuous sequence of measurements on the FPGA die temperature, as well as the VCCINT and VCCAUX supply voltage levels. This feature in Virtex-5 devices eliminates the added complexity and cost of implementing external monitoring components to a system.
Moreover, the System Monitor feature allows you to take power supply measurements from the die itself (inside the package), which is not possible using an external ADC.
You can also use System Monitor to get accurate thermal readings. Traditionally, engineers used thermal diodes to monitor die temperatures, but they had to pay careful attention to the PCB layout because diode measurements are highly sensitive to noise from other devices and features on the PCB, as well as other implementation details such as signal offsets and tolerances. The new System Monitor gets around that issue. It incorporates a temperature sensor on the FPGA die to allow you to take accurate temperature readings from the die itself (Fig 2).
2. The System Monitor sensor, located in the center of the Virtex-5 device die, provides valuable on-chip voltage and temperature data accessible during product development, when the device is in mass production, or even after deployment in the field.
(Click this image to view a larger, more detailed version)
These power and thermal monitoring capabilities allow for the implementation of safety functions such as power-on self-check or over-temperature power down. System Monitor's internal power supply measurements are accurate to within ±1%, while monitoring of the on-chip temperature sensor is accurate to ±4°C in the –40°C to +125°C range.
The System Monitor circuitry also includes an integrated multiplexer that not only supports inputs for the two on-chip voltage-sensing channels and temperature sensor, but also accepts inputs from as many as 17 additional analog sources external to the FPGA. This means that you can use System Monitor to monitor various off-chip analog signals. It supports off-chip inputs that are single-ended or differential signals, up to 1.0V in amplitude; thus, you can connect to many types of sensors, including shunt resistor-based current sensors, accelerometers, position sensors, and external temperature sensors.
The System Monitor control system also includes an automatic channel sequencer that allows you to define which parameters you want to monitor. You configure System Monitor by setting up its control registers. To do this, simply instantiate System Monitor in your design or write to the control registers over JTAG. The Xilinx ISE software tool suite also includes a utility called the System Monitor architecture wizard to walk you through the instantiation process.
Turning on the TAP
By designing System Monitor to deliver this data directly to the FPGA's JTAG TAP, Xilinx has opened up many new opportunities for extracting detailed information from prototype or production systems. Moreover, you can import the data into boundary scan test gear that operates at a high level of abstraction.
Although most engineers are familiar with using boundary scan to program devices in situ, many remain unaware of its power as an unobtrusive debugging and test solution. Applying tests through the JTAG TAP means that you no longer need to physically attach test probes to a development board or production assembly. Attaching probes is time-consuming and leaves the test strategy vulnerable to errors.
More importantly, it is impossible to physically probe modern BGA- and CSP-type device packages because the ball pitch is so fine and is located under the device's body. And as the industry increasingly uses these packages in new ICs, it is effectively reducing the amount of test coverage you can achieve using conventional test techniques.
Boundary scan testing, as defined by the Joint Test Action Group and ratified as IEEE1149.1, specifies a four-wire TAP and boundary scan architecture that engineers can implement in their IC designs to facilitate product testing later in the IC development cycle. The four-wire TAP interface allows engineers to read values into and out of pins or internal registers of JTAG devices. And with access to these pins, you can debug and test other devices on the circuit board, such as FPGAs, EEPROMs, RAMs, and flash memory.
Using boundary scan test equipment, you can perform quick net-level diagnostics without having to rely on embedded test software or functional tests. The PCB doesn't need to be running for you to use it, so you can quickly verify basic functionality as soon as first prototypes return from assembly, even if the board will not boot up. You can also carry out basic checks, toggling individual pins or buses to locate shorts, breaks, poor joints, or incorrect connections.
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